1. Field of the Invention
The present invention relates to a semiconductor device having a semiconductor substrate and a conductor layer formed thereon, and a method for making such a semiconductor device.
2. Background Information
A prior-art semiconductor device, shown in Japanese Patent Kokai Publication No. 174948/1987, uses a conductor layer of which a wide part in the periphery of the chip is provided with slits in order to prevent or reduce sliding or disconnection due to an internal stress of plastic packaging or a thermal stress during thermal cycle tests.
The slits are normally provided to extend in the direction in which the conductor extends. At a junction 20 where two conductor parts are connected or branched as shown in FIG. 11, the directions of the slits 21 in the respective conductor parts are made parallel with the edges of the conductor parts in which the slits are provided. A problem associated with the pattern off slits shown in FIG. 11 is that electric currents concentrate in the hatched area 22, and electromigration tends to occur. This degrades the reliability of the conductor layer.
Moreover, in the past, the insertion or disposition of the slits was made manually, in accordance with slit introduction standards determined for each LSI vendor, so the designing of the slit insertion was time-consuming. Furthermore, there is an increasing demand for the layout to be performed by LSI developers rather than LSI vendors. But as the LSI developers have little experience with layout designing, it is very difficult for them to carry out the slit insertion designing using a layout editor.
It is therefore desirable to be able to provide automatic insertion of slits in the conductor patterns.
Another prior-art publication, Japanese Patent Kokoku Publication No. 46981/1988 shows a method of disposition of slits at a corner of a conductor pattern. But it does not teach methods or rules of deposition which can be applied to various types of junction parts.